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<div class="header">
  <div class="headertitle"><div class="title">trcDefines.h</div></div>
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<div class="fragment"><div class="line"><a id="l00001" name="l00001"></a><span class="lineno">    1</span><span class="comment">/*</span></div>
<div class="line"><a id="l00002" name="l00002"></a><span class="lineno">    2</span><span class="comment"> * Trace Recorder for Tracealyzer v4.8.0</span></div>
<div class="line"><a id="l00003" name="l00003"></a><span class="lineno">    3</span><span class="comment"> * Copyright 2023 Percepio AB</span></div>
<div class="line"><a id="l00004" name="l00004"></a><span class="lineno">    4</span><span class="comment"> * www.percepio.com</span></div>
<div class="line"><a id="l00005" name="l00005"></a><span class="lineno">    5</span><span class="comment"> *</span></div>
<div class="line"><a id="l00006" name="l00006"></a><span class="lineno">    6</span><span class="comment"> * SPDX-License-Identifier: Apache-2.0</span></div>
<div class="line"><a id="l00007" name="l00007"></a><span class="lineno">    7</span><span class="comment"> *</span></div>
<div class="line"><a id="l00008" name="l00008"></a><span class="lineno">    8</span><span class="comment"> * Some common defines for the trace recorder.</span></div>
<div class="line"><a id="l00009" name="l00009"></a><span class="lineno">    9</span><span class="comment"> */</span></div>
<div class="line"><a id="l00010" name="l00010"></a><span class="lineno">   10</span> </div>
<div class="line"><a id="l00011" name="l00011"></a><span class="lineno">   11</span><span class="preprocessor">#ifndef TRC_DEFINES_H</span></div>
<div class="line"><a id="l00012" name="l00012"></a><span class="lineno">   12</span><span class="preprocessor">#define TRC_DEFINES_H</span></div>
<div class="line"><a id="l00013" name="l00013"></a><span class="lineno">   13</span> </div>
<div class="line"><a id="l00014" name="l00014"></a><span class="lineno">   14</span><span class="preprocessor">#define TRC_SUCCESS ((traceResult)0)</span></div>
<div class="line"><a id="l00015" name="l00015"></a><span class="lineno">   15</span><span class="preprocessor">#define TRC_FAIL ((traceResult)1)</span></div>
<div class="line"><a id="l00016" name="l00016"></a><span class="lineno">   16</span> </div>
<div class="line"><a id="l00017" name="l00017"></a><span class="lineno">   17</span><span class="preprocessor">#define TRC_FREE_RUNNING_32BIT_INCR 1</span></div>
<div class="line"><a id="l00018" name="l00018"></a><span class="lineno">   18</span><span class="preprocessor">#define TRC_FREE_RUNNING_32BIT_DECR 2</span></div>
<div class="line"><a id="l00019" name="l00019"></a><span class="lineno">   19</span><span class="preprocessor">#define TRC_OS_TIMER_INCR 3</span></div>
<div class="line"><a id="l00020" name="l00020"></a><span class="lineno">   20</span><span class="preprocessor">#define TRC_OS_TIMER_DECR 4</span></div>
<div class="line"><a id="l00021" name="l00021"></a><span class="lineno">   21</span><span class="preprocessor">#define TRC_CUSTOM_TIMER_INCR 5</span></div>
<div class="line"><a id="l00022" name="l00022"></a><span class="lineno">   22</span><span class="preprocessor">#define TRC_CUSTOM_TIMER_DECR 6</span></div>
<div class="line"><a id="l00023" name="l00023"></a><span class="lineno">   23</span> </div>
<div class="line"><a id="l00024" name="l00024"></a><span class="lineno">   24</span><span class="preprocessor">#define TRC_STATE_IN_STARTUP 0</span></div>
<div class="line"><a id="l00025" name="l00025"></a><span class="lineno">   25</span><span class="preprocessor">#define TRC_STATE_IN_TASKSWITCH 1</span></div>
<div class="line"><a id="l00026" name="l00026"></a><span class="lineno">   26</span><span class="preprocessor">#define TRC_STATE_IN_APPLICATION 2</span></div>
<div class="line"><a id="l00027" name="l00027"></a><span class="lineno">   27</span> </div>
<div class="line"><a id="l00028" name="l00028"></a><span class="lineno">   28</span><span class="comment">/* Start options for vTraceEnable. */</span></div>
<div class="line"><a id="l00029" name="l00029"></a><span class="lineno">   29</span><span class="preprocessor">#define TRC_START_FROM_HOST     0UL</span></div>
<div class="line"><a id="l00030" name="l00030"></a><span class="lineno">   30</span><span class="preprocessor">#define TRC_START               1UL</span></div>
<div class="line"><a id="l00031" name="l00031"></a><span class="lineno">   31</span><span class="preprocessor">#define TRC_START_AWAIT_HOST    2UL</span></div>
<div class="line"><a id="l00032" name="l00032"></a><span class="lineno">   32</span> </div>
<div class="line"><a id="l00033" name="l00033"></a><span class="lineno">   33</span><span class="preprocessor">#define TRC_ACKNOWLEDGED (0xABC99123)</span></div>
<div class="line"><a id="l00034" name="l00034"></a><span class="lineno">   34</span> </div>
<div class="line"><a id="l00035" name="l00035"></a><span class="lineno">   35</span><span class="comment">/* Command codes for TzCtrl task */</span></div>
<div class="line"><a id="l00036" name="l00036"></a><span class="lineno">   36</span><span class="preprocessor">#define CMD_SET_ACTIVE      1 </span><span class="comment">/* Start (param1 = 1) or Stop (param1 = 0) */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00037" name="l00037"></a><span class="lineno">   37</span> </div>
<div class="line"><a id="l00038" name="l00038"></a><span class="lineno">   38</span><span class="comment">/* The final command code, used to validate commands. */</span></div>
<div class="line"><a id="l00039" name="l00039"></a><span class="lineno">   39</span><span class="preprocessor">#define CMD_LAST_COMMAND 1</span></div>
<div class="line"><a id="l00040" name="l00040"></a><span class="lineno">   40</span> </div>
<div class="line"><a id="l00041" name="l00041"></a><span class="lineno">   41</span><span class="preprocessor">#define TRC_RECORDER_MODE_SNAPSHOT      0</span></div>
<div class="line"><a id="l00042" name="l00042"></a><span class="lineno">   42</span><span class="preprocessor">#define TRC_RECORDER_MODE_STREAMING     1</span></div>
<div class="line"><a id="l00043" name="l00043"></a><span class="lineno">   43</span> </div>
<div class="line"><a id="l00044" name="l00044"></a><span class="lineno">   44</span><span class="preprocessor">#define TRC_SNAPSHOT_MODE_RING_BUFFER       (0x01UL)</span></div>
<div class="line"><a id="l00045" name="l00045"></a><span class="lineno">   45</span><span class="preprocessor">#define TRC_SNAPSHOT_MODE_STOP_WHEN_FULL    (0x02UL)</span></div>
<div class="line"><a id="l00046" name="l00046"></a><span class="lineno">   46</span> </div>
<div class="line"><a id="l00047" name="l00047"></a><span class="lineno">   47</span><span class="preprocessor">#define TRC_RECORDER_BUFFER_ALLOCATION_STATIC   (0x00UL)</span></div>
<div class="line"><a id="l00048" name="l00048"></a><span class="lineno">   48</span><span class="preprocessor">#define TRC_RECORDER_BUFFER_ALLOCATION_DYNAMIC  (0x01UL)</span></div>
<div class="line"><a id="l00049" name="l00049"></a><span class="lineno">   49</span><span class="preprocessor">#define TRC_RECORDER_BUFFER_ALLOCATION_CUSTOM   (0x02UL)</span></div>
<div class="line"><a id="l00050" name="l00050"></a><span class="lineno">   50</span> </div>
<div class="line"><a id="l00051" name="l00051"></a><span class="lineno">   51</span><span class="preprocessor">#define TRC_OPTION_BIT_SHIFT_IRQ_ORDER 0</span></div>
<div class="line"><a id="l00052" name="l00052"></a><span class="lineno">   52</span><span class="preprocessor">#define TRC_OPTION_BIT_SHIFT_BASE_SIZE 8</span></div>
<div class="line"><a id="l00053" name="l00053"></a><span class="lineno">   53</span> </div>
<div class="line"><a id="l00054" name="l00054"></a><span class="lineno">   54</span><span class="comment">/******************************************************************************/</span></div>
<div class="line"><a id="l00055" name="l00055"></a><span class="lineno">   55</span><span class="comment">/*** ERROR AND WARNING CODES (check using xTraceErrorGetLast) *****************/</span></div>
<div class="line"><a id="l00056" name="l00056"></a><span class="lineno">   56</span><span class="comment">/******************************************************************************/</span></div>
<div class="line"><a id="l00057" name="l00057"></a><span class="lineno">   57</span> </div>
<div class="line"><a id="l00058" name="l00058"></a><span class="lineno">   58</span><span class="preprocessor">#define TRC_ERROR_NONE                              0x00UL</span></div>
<div class="line"><a id="l00059" name="l00059"></a><span class="lineno">   59</span> </div>
<div class="line"><a id="l00060" name="l00060"></a><span class="lineno">   60</span><span class="preprocessor">#define TRC_ERROR_ASSERT                            0x01UL</span></div>
<div class="line"><a id="l00061" name="l00061"></a><span class="lineno">   61</span><span class="preprocessor">#define TRC_ERROR_EVENT_CODE_TOO_LARGE              0x02UL</span></div>
<div class="line"><a id="l00062" name="l00062"></a><span class="lineno">   62</span><span class="preprocessor">#define TRC_ERROR_ISR_NESTING_OVERFLOW              0x03UL</span></div>
<div class="line"><a id="l00063" name="l00063"></a><span class="lineno">   63</span><span class="preprocessor">#define TRC_ERROR_DWT_NOT_SUPPORTED                 0x04UL</span></div>
<div class="line"><a id="l00064" name="l00064"></a><span class="lineno">   64</span><span class="preprocessor">#define TRC_ERROR_DWT_CYCCNT_NOT_SUPPORTED          0x05UL</span></div>
<div class="line"><a id="l00065" name="l00065"></a><span class="lineno">   65</span><span class="preprocessor">#define TRC_ERROR_TZCTRLTASK_NOT_CREATED            0x06UL</span></div>
<div class="line"><a id="l00066" name="l00066"></a><span class="lineno">   66</span><span class="preprocessor">#define TRC_ERROR_STREAM_PORT_WRITE                 0x07UL</span></div>
<div class="line"><a id="l00067" name="l00067"></a><span class="lineno">   67</span> </div>
<div class="line"><a id="l00068" name="l00068"></a><span class="lineno">   68</span><span class="preprocessor">#define TRC_WARNING_ENTRY_TABLE_SLOTS               0x08UL</span></div>
<div class="line"><a id="l00069" name="l00069"></a><span class="lineno">   69</span><span class="preprocessor">#define TRC_WARNING_ENTRY_SYMBOL_MAX_LENGTH         0x09UL</span></div>
<div class="line"><a id="l00070" name="l00070"></a><span class="lineno">   70</span><span class="preprocessor">#define TRC_WARNING_EVENT_SIZE_TRUNCATED            0x0AUL</span></div>
<div class="line"><a id="l00071" name="l00071"></a><span class="lineno">   71</span><span class="preprocessor">#define TRC_WARNING_STREAM_PORT_READ                0x0BUL</span></div>
<div class="line"><a id="l00072" name="l00072"></a><span class="lineno">   72</span><span class="preprocessor">#define TRC_WARNING_STREAM_PORT_WRITE               0x0CUL</span></div>
<div class="line"><a id="l00073" name="l00073"></a><span class="lineno">   73</span><span class="preprocessor">#define TRC_WARNING_STREAM_PORT_INITIAL_BLOCKING    0x0DUL</span></div>
<div class="line"><a id="l00074" name="l00074"></a><span class="lineno">   74</span><span class="preprocessor">#define TRC_WARNING_STACKMON_NO_SLOTS               0x0EUL</span></div>
<div class="line"><a id="l00075" name="l00075"></a><span class="lineno">   75</span> </div>
<div class="line"><a id="l00076" name="l00076"></a><span class="lineno">   76</span><span class="comment">/* Entry Option definitions */</span></div>
<div class="line"><a id="l00077" name="l00077"></a><span class="lineno">   77</span><span class="preprocessor">#define TRC_ENTRY_OPTION_EXCLUDED               0x00000001UL</span></div>
<div class="line"><a id="l00078" name="l00078"></a><span class="lineno">   78</span><span class="preprocessor">#define TRC_ENTRY_OPTION_HEAP                   0x80000000UL</span></div>
<div class="line"><a id="l00079" name="l00079"></a><span class="lineno">   79</span><span class="preprocessor">#define TRC_ENTRY_OPTION_EXTENSION              0x40000000UL</span></div>
<div class="line"><a id="l00080" name="l00080"></a><span class="lineno">   80</span><span class="preprocessor">#define TRC_ENTRY_OPTION_STATE_MACHINE          0x20000000UL</span></div>
<div class="line"><a id="l00081" name="l00081"></a><span class="lineno">   81</span><span class="preprocessor">#define TRC_ENTRY_OPTION_STATE_MACHINE_STATE    0x10000000UL</span></div>
<div class="line"><a id="l00082" name="l00082"></a><span class="lineno">   82</span><span class="preprocessor">#define TRC_ENTRY_OPTION_INTERVAL_CHANNEL       0x08000000UL</span></div>
<div class="line"><a id="l00083" name="l00083"></a><span class="lineno">   83</span><span class="preprocessor">#define TRC_ENTRY_OPTION_COUNTER                0x04000000UL</span></div>
<div class="line"><a id="l00084" name="l00084"></a><span class="lineno">   84</span><span class="preprocessor">#define TRC_ENTRY_OPTION_INTERVAL_CHANNEL_SET   0x02000000UL</span></div>
<div class="line"><a id="l00085" name="l00085"></a><span class="lineno">   85</span><span class="preprocessor">#define TRC_ENTRY_OPTION_IDLE_NAME              0x01000000UL</span></div>
<div class="line"><a id="l00086" name="l00086"></a><span class="lineno">   86</span><span class="preprocessor">#define TRC_ENTRY_OPTION_RUNNABLE               0x00800000UL</span></div>
<div class="line"><a id="l00087" name="l00087"></a><span class="lineno">   87</span><span class="preprocessor">#define TRC_ENTRY_OPTION_DEPENDENCY             0x00400000UL</span></div>
<div class="line"><a id="l00088" name="l00088"></a><span class="lineno">   88</span> </div>
<div class="line"><a id="l00089" name="l00089"></a><span class="lineno">   89</span><span class="preprocessor">#define TRC_DEPENDENCY_TYPE_ELF                 0x00000001UL</span></div>
<div class="line"><a id="l00090" name="l00090"></a><span class="lineno">   90</span> </div>
<div class="line"><a id="l00091" name="l00091"></a><span class="lineno">   91</span><span class="preprocessor">#define TRC_RECORDER_COMPONENT_CORE                     0x00000001UL</span></div>
<div class="line"><a id="l00092" name="l00092"></a><span class="lineno">   92</span><span class="preprocessor">#define TRC_RECORDER_COMPONENT_ASSERT                   0x00000002UL</span></div>
<div class="line"><a id="l00093" name="l00093"></a><span class="lineno">   93</span><span class="preprocessor">#define TRC_RECORDER_COMPONENT_BLOB                     0x00000004UL</span></div>
<div class="line"><a id="l00094" name="l00094"></a><span class="lineno">   94</span><span class="preprocessor">#define TRC_RECORDER_COMPONENT_DIAGNOSTICS              0x00000008UL</span></div>
<div class="line"><a id="l00095" name="l00095"></a><span class="lineno">   95</span><span class="preprocessor">#define TRC_RECORDER_COMPONENT_ENTRY                    0x00000010UL</span></div>
<div class="line"><a id="l00096" name="l00096"></a><span class="lineno">   96</span><span class="preprocessor">#define TRC_RECORDER_COMPONENT_ERROR                    0x00000020UL</span></div>
<div class="line"><a id="l00097" name="l00097"></a><span class="lineno">   97</span><span class="preprocessor">#define TRC_RECORDER_COMPONENT_EVENT                    0x00000040UL</span></div>
<div class="line"><a id="l00098" name="l00098"></a><span class="lineno">   98</span><span class="preprocessor">#define TRC_RECORDER_COMPONENT_EVENT_BUFFER             0x00000080UL</span></div>
<div class="line"><a id="l00099" name="l00099"></a><span class="lineno">   99</span><span class="preprocessor">#define TRC_RECORDER_COMPONENT_EXTENSION                0x00000100UL</span></div>
<div class="line"><a id="l00100" name="l00100"></a><span class="lineno">  100</span><span class="preprocessor">#define TRC_RECORDER_COMPONENT_HEAP                     0x00000200UL</span></div>
<div class="line"><a id="l00101" name="l00101"></a><span class="lineno">  101</span><span class="preprocessor">#define TRC_RECORDER_COMPONENT_INTERNAL_EVENT_BUFFER    0x00000400UL</span></div>
<div class="line"><a id="l00102" name="l00102"></a><span class="lineno">  102</span><span class="preprocessor">#define TRC_RECORDER_COMPONENT_INTERVAL                 0x00000800UL</span></div>
<div class="line"><a id="l00103" name="l00103"></a><span class="lineno">  103</span><span class="preprocessor">#define TRC_RECORDER_COMPONENT_ISR                      0x00001000UL</span></div>
<div class="line"><a id="l00104" name="l00104"></a><span class="lineno">  104</span><span class="preprocessor">#define TRC_RECORDER_COMPONENT_MULTI_CORE_EVENT_BUFFER  0x00002000UL</span></div>
<div class="line"><a id="l00105" name="l00105"></a><span class="lineno">  105</span><span class="preprocessor">#define TRC_RECORDER_COMPONENT_OBJECT                   0x00004000UL</span></div>
<div class="line"><a id="l00106" name="l00106"></a><span class="lineno">  106</span><span class="preprocessor">#define TRC_RECORDER_COMPONENT_PRINT                    0x00008000UL</span></div>
<div class="line"><a id="l00107" name="l00107"></a><span class="lineno">  107</span><span class="preprocessor">#define TRC_RECORDER_COMPONENT_STACK_MONITOR            0x00010000UL</span></div>
<div class="line"><a id="l00108" name="l00108"></a><span class="lineno">  108</span><span class="preprocessor">#define TRC_RECORDER_COMPONENT_STATE_MACHINE            0x00020000UL</span></div>
<div class="line"><a id="l00109" name="l00109"></a><span class="lineno">  109</span><span class="preprocessor">#define TRC_RECORDER_COMPONENT_STATIC_BUFFER            0x00040000UL</span></div>
<div class="line"><a id="l00110" name="l00110"></a><span class="lineno">  110</span><span class="preprocessor">#define TRC_RECORDER_COMPONENT_STRING                   0x00080000UL</span></div>
<div class="line"><a id="l00111" name="l00111"></a><span class="lineno">  111</span><span class="preprocessor">#define TRC_RECORDER_COMPONENT_TASK                     0x00100000UL</span></div>
<div class="line"><a id="l00112" name="l00112"></a><span class="lineno">  112</span><span class="preprocessor">#define TRC_RECORDER_COMPONENT_TIMESTAMP                0x00200000UL</span></div>
<div class="line"><a id="l00113" name="l00113"></a><span class="lineno">  113</span><span class="preprocessor">#define TRC_RECORDER_COMPONENT_COUNTER                  0x00400000UL</span></div>
<div class="line"><a id="l00114" name="l00114"></a><span class="lineno">  114</span> </div>
<div class="line"><a id="l00115" name="l00115"></a><span class="lineno">  115</span><span class="comment">/* Filter Groups */</span></div>
<div class="line"><a id="l00116" name="l00116"></a><span class="lineno">  116</span><span class="preprocessor">#define FilterGroup0 (uint16_t)0x0001</span></div>
<div class="line"><a id="l00117" name="l00117"></a><span class="lineno">  117</span><span class="preprocessor">#define FilterGroup1 (uint16_t)0x0002</span></div>
<div class="line"><a id="l00118" name="l00118"></a><span class="lineno">  118</span><span class="preprocessor">#define FilterGroup2 (uint16_t)0x0004</span></div>
<div class="line"><a id="l00119" name="l00119"></a><span class="lineno">  119</span><span class="preprocessor">#define FilterGroup3 (uint16_t)0x0008</span></div>
<div class="line"><a id="l00120" name="l00120"></a><span class="lineno">  120</span><span class="preprocessor">#define FilterGroup4 (uint16_t)0x0010</span></div>
<div class="line"><a id="l00121" name="l00121"></a><span class="lineno">  121</span><span class="preprocessor">#define FilterGroup5 (uint16_t)0x0020</span></div>
<div class="line"><a id="l00122" name="l00122"></a><span class="lineno">  122</span><span class="preprocessor">#define FilterGroup6 (uint16_t)0x0040</span></div>
<div class="line"><a id="l00123" name="l00123"></a><span class="lineno">  123</span><span class="preprocessor">#define FilterGroup7 (uint16_t)0x0080</span></div>
<div class="line"><a id="l00124" name="l00124"></a><span class="lineno">  124</span><span class="preprocessor">#define FilterGroup8 (uint16_t)0x0100</span></div>
<div class="line"><a id="l00125" name="l00125"></a><span class="lineno">  125</span><span class="preprocessor">#define FilterGroup9 (uint16_t)0x0200</span></div>
<div class="line"><a id="l00126" name="l00126"></a><span class="lineno">  126</span><span class="preprocessor">#define FilterGroup10 (uint16_t)0x0400</span></div>
<div class="line"><a id="l00127" name="l00127"></a><span class="lineno">  127</span><span class="preprocessor">#define FilterGroup11 (uint16_t)0x0800</span></div>
<div class="line"><a id="l00128" name="l00128"></a><span class="lineno">  128</span><span class="preprocessor">#define FilterGroup12 (uint16_t)0x1000</span></div>
<div class="line"><a id="l00129" name="l00129"></a><span class="lineno">  129</span><span class="preprocessor">#define FilterGroup13 (uint16_t)0x2000</span></div>
<div class="line"><a id="l00130" name="l00130"></a><span class="lineno">  130</span><span class="preprocessor">#define FilterGroup14 (uint16_t)0x4000</span></div>
<div class="line"><a id="l00131" name="l00131"></a><span class="lineno">  131</span><span class="preprocessor">#define FilterGroup15 (uint16_t)0x8000</span></div>
<div class="line"><a id="l00132" name="l00132"></a><span class="lineno">  132</span> </div>
<div class="line"><a id="l00136" name="l00136"></a><span class="lineno">  136</span><span class="preprocessor">#define TRC_INTERNAL_EVENT_BUFFER_OPTION_WRITE_MODE_COPY        (0U)</span></div>
<div class="line"><a id="l00137" name="l00137"></a><span class="lineno">  137</span><span class="preprocessor">#define TRC_INTERNAL_EVENT_BUFFER_OPTION_WRITE_MODE_DIRECT      (1U)</span></div>
<div class="line"><a id="l00138" name="l00138"></a><span class="lineno">  138</span> </div>
<div class="line"><a id="l00142" name="l00142"></a><span class="lineno">  142</span><span class="preprocessor">#define TRC_INTERNAL_EVENT_BUFFER_OPTION_TRANSFER_MODE_ALL      (0U)</span></div>
<div class="line"><a id="l00143" name="l00143"></a><span class="lineno">  143</span><span class="preprocessor">#define TRC_INTERNAL_EVENT_BUFFER_OPTION_TRANSFER_MODE_CHUNKED  (1U)</span></div>
<div class="line"><a id="l00144" name="l00144"></a><span class="lineno">  144</span> </div>
<div class="line"><a id="l00145" name="l00145"></a><span class="lineno">  145</span><span class="comment">/******************************************************************************</span></div>
<div class="line"><a id="l00146" name="l00146"></a><span class="lineno">  146</span><span class="comment"> * Supported ports</span></div>
<div class="line"><a id="l00147" name="l00147"></a><span class="lineno">  147</span><span class="comment"> *</span></div>
<div class="line"><a id="l00148" name="l00148"></a><span class="lineno">  148</span><span class="comment"> * TRC_HARDWARE_PORT_HWIndependent</span></div>
<div class="line"><a id="l00149" name="l00149"></a><span class="lineno">  149</span><span class="comment"> * A hardware independent fallback option for event timestamping. Provides low</span></div>
<div class="line"><a id="l00150" name="l00150"></a><span class="lineno">  150</span><span class="comment"> * resolution timestamps based on the OS tick.</span></div>
<div class="line"><a id="l00151" name="l00151"></a><span class="lineno">  151</span><span class="comment"> * This may be used on the Win32 port, but may also be used on embedded hardware</span></div>
<div class="line"><a id="l00152" name="l00152"></a><span class="lineno">  152</span><span class="comment"> * platforms. All time durations will be truncated to the OS tick frequency,</span></div>
<div class="line"><a id="l00153" name="l00153"></a><span class="lineno">  153</span><span class="comment"> * typically 1 KHz. This means that a task or ISR that executes in less than</span></div>
<div class="line"><a id="l00154" name="l00154"></a><span class="lineno">  154</span><span class="comment"> * 1 ms get an execution time of zero.</span></div>
<div class="line"><a id="l00155" name="l00155"></a><span class="lineno">  155</span><span class="comment"> *</span></div>
<div class="line"><a id="l00156" name="l00156"></a><span class="lineno">  156</span><span class="comment"> * TRC_HARDWARE_PORT_APPLICATION_DEFINED</span></div>
<div class="line"><a id="l00157" name="l00157"></a><span class="lineno">  157</span><span class="comment"> * Allows for defining the port macros in other source code files.</span></div>
<div class="line"><a id="l00158" name="l00158"></a><span class="lineno">  158</span><span class="comment"> *</span></div>
<div class="line"><a id="l00159" name="l00159"></a><span class="lineno">  159</span><span class="comment"> * TRC_HARDWARE_PORT_Win32</span></div>
<div class="line"><a id="l00160" name="l00160"></a><span class="lineno">  160</span><span class="comment"> * &quot;Accurate&quot; timestamping based on the Windows performance counter for Win32</span></div>
<div class="line"><a id="l00161" name="l00161"></a><span class="lineno">  161</span><span class="comment"> * builds. Note that this gives the host machine time, not the kernel time.</span></div>
<div class="line"><a id="l00162" name="l00162"></a><span class="lineno">  162</span><span class="comment"> *</span></div>
<div class="line"><a id="l00163" name="l00163"></a><span class="lineno">  163</span><span class="comment"> * Hardware specific ports</span></div>
<div class="line"><a id="l00164" name="l00164"></a><span class="lineno">  164</span><span class="comment"> * To get accurate timestamping, a hardware timer is necessary. Below are the</span></div>
<div class="line"><a id="l00165" name="l00165"></a><span class="lineno">  165</span><span class="comment"> * available ports. Some of these are &quot;unofficial&quot;, meaning that</span></div>
<div class="line"><a id="l00166" name="l00166"></a><span class="lineno">  166</span><span class="comment"> * they have not yet been verified by Percepio but have been contributed by</span></div>
<div class="line"><a id="l00167" name="l00167"></a><span class="lineno">  167</span><span class="comment"> * external developers. They should work, otherwise let us know by emailing</span></div>
<div class="line"><a id="l00168" name="l00168"></a><span class="lineno">  168</span><span class="comment"> * support@percepio.com. Some work on any OS platform, while other are specific</span></div>
<div class="line"><a id="l00169" name="l00169"></a><span class="lineno">  169</span><span class="comment"> * to a certain operating system.</span></div>
<div class="line"><a id="l00170" name="l00170"></a><span class="lineno">  170</span><span class="comment"> *****************************************************************************/</span></div>
<div class="line"><a id="l00171" name="l00171"></a><span class="lineno">  171</span> </div>
<div class="line"><a id="l00172" name="l00172"></a><span class="lineno">  172</span><span class="comment">/****** Port Name ************************************* Code ** Official ** OS Platform *********/</span></div>
<div class="line"><a id="l00173" name="l00173"></a><span class="lineno">  173</span><span class="preprocessor">#define TRC_HARDWARE_PORT_APPLICATION_DEFINED           98  </span><span class="comment">/*  -           -                   */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00174" name="l00174"></a><span class="lineno">  174</span><span class="preprocessor">#define TRC_HARDWARE_PORT_NOT_SET               99  </span><span class="comment">/*  -           -                   */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00175" name="l00175"></a><span class="lineno">  175</span><span class="preprocessor">#define TRC_HARDWARE_PORT_HWIndependent             0   </span><span class="comment">/*  Yes         Any                 */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00176" name="l00176"></a><span class="lineno">  176</span><span class="preprocessor">#define TRC_HARDWARE_PORT_Win32                 1   </span><span class="comment">/*  Yes         FreeRTOS on Win32                       */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00177" name="l00177"></a><span class="lineno">  177</span><span class="preprocessor">#define TRC_HARDWARE_PORT_Atmel_AT91SAM7                2   </span><span class="comment">/*  No          Any                 */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00178" name="l00178"></a><span class="lineno">  178</span><span class="preprocessor">#define TRC_HARDWARE_PORT_Atmel_UC3A0               3   </span><span class="comment">/*  No          Any                 */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00179" name="l00179"></a><span class="lineno">  179</span><span class="preprocessor">#define TRC_HARDWARE_PORT_ARM_Cortex_M              4   </span><span class="comment">/*  Yes         Any                 */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00180" name="l00180"></a><span class="lineno">  180</span><span class="preprocessor">#define TRC_HARDWARE_PORT_Renesas_RX600             6   </span><span class="comment">/*  Yes         Any                 */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00181" name="l00181"></a><span class="lineno">  181</span><span class="preprocessor">#define TRC_HARDWARE_PORT_MICROCHIP_PIC24_PIC32         7   </span><span class="comment">/*  Yes         Any                 */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00182" name="l00182"></a><span class="lineno">  182</span><span class="preprocessor">#define TRC_HARDWARE_PORT_TEXAS_INSTRUMENTS_TMS570_RM48         8       </span><span class="comment">/*  Yes         Any                 */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00183" name="l00183"></a><span class="lineno">  183</span><span class="preprocessor">#define TRC_HARDWARE_PORT_TEXAS_INSTRUMENTS_MSP430      9   </span><span class="comment">/*  No          Any                 */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00184" name="l00184"></a><span class="lineno">  184</span><span class="preprocessor">#define TRC_HARDWARE_PORT_XILINX_PPC405             11  </span><span class="comment">/*  No          FreeRTOS                                */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00185" name="l00185"></a><span class="lineno">  185</span><span class="preprocessor">#define TRC_HARDWARE_PORT_XILINX_PPC440             12  </span><span class="comment">/*  No          FreeRTOS                                */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00186" name="l00186"></a><span class="lineno">  186</span><span class="preprocessor">#define TRC_HARDWARE_PORT_XILINX_MICROBLAZE         13      </span><span class="comment">/*  No          Any                 */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00187" name="l00187"></a><span class="lineno">  187</span><span class="preprocessor">#define TRC_HARDWARE_PORT_XILINX_ZyncUltraScaleR5       14      </span><span class="comment">/*      No          FreeRTOS                                */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00188" name="l00188"></a><span class="lineno">  188</span><span class="preprocessor">#define TRC_HARDWARE_PORT_NXP_LPC210X               15      </span><span class="comment">/*  No          Any                 */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00189" name="l00189"></a><span class="lineno">  189</span><span class="preprocessor">#define TRC_HARDWARE_PORT_ARM_CORTEX_A9             16      </span><span class="comment">/*  Yes         Any                 */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00190" name="l00190"></a><span class="lineno">  190</span><span class="preprocessor">#define TRC_HARDWARE_PORT_POWERPC_Z4                            17      </span><span class="comment">/*      No                      FreeRTOS                                */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00191" name="l00191"></a><span class="lineno">  191</span><span class="preprocessor">#define TRC_HARDWARE_PORT_Altera_NiosII             18      </span><span class="comment">/*      Yes                     Any (Tested with FreeRTOS)              */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00192" name="l00192"></a><span class="lineno">  192</span><span class="preprocessor">#define TRC_HARDWARE_PORT_ZEPHYR                                19      </span><span class="comment">/*      Yes                     Zephyr                                  */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00193" name="l00193"></a><span class="lineno">  193</span><span class="preprocessor">#define TRC_HARDWARE_PORT_XTensa_LX6                            20      </span><span class="comment">/*      Yes                     ESP-IDF FreeRTOS                        */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00194" name="l00194"></a><span class="lineno">  194</span><span class="preprocessor">#define TRC_HARDWARE_PORT_XTensa_LX7                            21      </span><span class="comment">/*      Yes                     ESP-IDF FreeRTOS                        */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00195" name="l00195"></a><span class="lineno">  195</span><span class="preprocessor">#define TRC_HARDWARE_PORT_Win64                     22      </span><span class="comment">/*  Yes         FreeRTOS on Win64                   */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00196" name="l00196"></a><span class="lineno">  196</span><span class="preprocessor">#define TRC_HARDWARE_PORT_XMOS_XCOREAI                          23      </span><span class="comment">/*      Yes                     FreeRTOS SMP                            */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00197" name="l00197"></a><span class="lineno">  197</span><span class="preprocessor">#define TRC_HARDWARE_PORT_RISCV_RV32I                   24      </span><span class="comment">/*  Yes         FreeRTOS                    */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00198" name="l00198"></a><span class="lineno">  198</span><span class="preprocessor">#define TRC_HARDWARE_PORT_CYCLONE_V_HPS                 25      </span><span class="comment">/*  Yes         FreeRTOS                    */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00199" name="l00199"></a><span class="lineno">  199</span><span class="preprocessor">#define TRC_HARDWARE_PORT_ARM_Cortex_M_NRF_SD                   26      </span><span class="comment">/*      Yes                     FreeRTOS                                */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00200" name="l00200"></a><span class="lineno">  200</span><span class="preprocessor">#define TRC_HARDWARE_PORT_ARMv8AR_A32               27  </span><span class="comment">/*  Yes         Any                 */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00201" name="l00201"></a><span class="lineno">  201</span> </div>
<div class="line"><a id="l00202" name="l00202"></a><span class="lineno">  202</span><span class="preprocessor">#endif </span><span class="comment">/* TRC_PORTDEFINES_H */</span><span class="preprocessor"></span></div>
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